From 87d881e6d0811f29647ecff55560da84cfb6906b Mon Sep 17 00:00:00 2001 From: Dennis Date: Wed, 12 Aug 2020 21:40:43 +0200 Subject: [PATCH] Updated some information and cleaned up the HTML Also added OpenSans-Regular-webfont.woff as a preload to improve performance --- index.html | 877 ++++++++++++++++++++++++----------------------------- 1 file changed, 401 insertions(+), 476 deletions(-) diff --git a/index.html b/index.html index 27fd8b4..04621d4 100755 --- a/index.html +++ b/index.html @@ -4,37 +4,42 @@ - - - Dennis Potter - Electrical Engineer & Computer Scientist - - + + + Dennis Potter - Electrical Engineer & Computer Scientist + + - - - - - - - - + - - + + + + + + + + - - + + + + + + @@ -42,563 +47,483 @@ -
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Who am I?

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- Currently an engineer at Marvell Semiconductor. Always curious about technological innovations and therefore graduated in electrical engineering & computer science. Strives for a complete understanding of computers, from the lowest level—i.e., the bare integrated circuits—to the highest—i.e., user space—, and is therefore always eager to learn something new. Enjoys writing small programs in his free time, either to automate everyday problems, or simply for the sake of fun, and gets excited by the seemingly endless possibilities of Linux. Loves a good read, also on non-tech subjects like economics, anthropology, or (geo)politics. -

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Who am I?

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Contact Details

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Do you want to get in touch? Click here to get to the contact section of this page. There I provided my phone number, email address, PGP Key ID, Matrix ID and several other ways to reach me!

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+ Currently I am a senior engineer at Marvell Semiconductor. I am always curious about technological innovations and therefore graduated in electrical engineering & computer science. Strives for a complete understanding of computers, from the lowest level—i.e., the bare integrated circuits—to the highest—i.e., user space—, and is therefore always eager to learn something new. Enjoys writing small programs in his free time, either to automate everyday problems, or simply for the sake of fun, and gets excited by the seemingly endless possibilities of Linux. Loves a good read, also on non-tech subjects like economics, anthropology, or (geo)politics. +

- Download my resume +

Contact Details

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Do you want to get in touch? Click here to get to the contact section of this page. There I provided my phone number, email address, PGP Key ID, Matrix ID and several other ways to reach me!

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Education

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RWTH Aachen University

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M.Sc. Electrical Engineering and Computer Science• - October 2015 - November 2018

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  • Specialization: Micro- and Nanoelectronics
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  • Final project: "Implementation and Analysis of an InfiniBand based Communication in a Real-Time Co-Simulation Framework"—An analysis and subsequent implementation of the Virtual Interface Architecture Infiniband, using the OpenStack verbs, in order to achieve high throughput and minimal latency between nodes of the real-time co-simulation framework VILLASnode. (Grade: A+)
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  • Modules included: lectures on VLSI architectures, computer arithmetics, mixed analog signals, neural networks, new materials and devices in information technology, numerical device simulation, and operating systems. Lab training on VLSI design, FPGA programming in VHDL, and on the production of FeRAM cells.
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RWTH Aachen University

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B.Sc. Electrical Engineering and Computer Science• - October 2011 - September 2015

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  • Final project: “Analysis of Concepts for Power Reduction in Arithmetic Units of MAP Decoders”—A mathematical, bit accurate implementation of a decoder in MATLAB and C++, to find techniques that will potentially reduce the switching activity (and thus the power) in the arithmetic units of the decoder. (Grade: A+)
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Sophianum SG. in het Heuvelland

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Gymnasium• - September 2005 - July 2011

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  • Comparable to a university-preparatory school with Latin as additional language.
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Work

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Marvell Semiconductor

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Engineer• September 2019 - Present

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  • Design of digital Ethernet logic.
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Aquantia Corporation

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Member of Technical Staff• December 2018 - September 2019

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  • Design of digital Ethernet logic.
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Consultant• August 2017 - November 2018

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  • Development of a layer 2 Ethernet switch in SystemC. The goal was to create a transmission line model to verify functionality, which could be easily translated into synthesizable code later, using a high-level synthesis suite.
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  • Support and further development of the FPGA user interface and the power analysis environment which was developed during the internship.
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Intern • Nobember 2016 - July 2017

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  • Creation of an automated power analysis environment, build on top of Ansys' PowerArtist. Subsequently, power analysis and reduction on various digital designs was done.
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  • Development of an intuitive graphical user interface, written in Python, Tkinter, and C, to access and manipulate an FPGA Ethernet debug tool.
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Education

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RWTH Aachen University

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M.Sc. Electrical Engineering and Computer Science• + October 2015 - November 2018

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  • Specialization: Micro- and Nanoelectronics
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  • Final project: "Implementation and Analysis of an InfiniBand based Communication in a Real-Time Co-Simulation Framework"—An analysis and subsequent implementation of the Virtual Interface Architecture Infiniband, using the OpenStack verbs, in order to achieve high throughput and minimal latency between nodes of the real-time co-simulation framework VILLASnode. (Grade: A+)
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  • Modules included: lectures on VLSI architectures, computer arithmetics, mixed analog signals, neural networks, new materials and devices in information technology, numerical device simulation, and operating systems. Lab training on VLSI design, FPGA programming in VHDL, and on the production of FeRAM cells.
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RWTH Aachen University

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B.Sc. Electrical Engineering and Computer Science• + October 2011 - September 2015

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  • Final project: “Analysis of Concepts for Power Reduction in Arithmetic Units of MAP Decoders”—A mathematical, bit accurate implementation of a decoder in MATLAB and C++, to find techniques that will potentially reduce the switching activity (and thus the power) in the arithmetic units of the decoder. (Grade: A+)
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Sophianum SG. in het Heuvelland

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Gymnasium• + September 2005 - July 2011

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  • Comparable to a university-preparatory school with Latin as additional language.
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Boscafé 't Hijgend Hert

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Web developer and server administrator • April 2012 - November 2018

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  • Responsible for the online marketing, the development of several websites and the maintenance and security of their Linux based virtual private server.
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Headwaiter • September 2010 - October 2016

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  • Head of a small subteam of about 8 waiters. Responsible for a smooth running of daily restaurant business.
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Chair for Electrical Engineering and Computer Systems, RWTH Aachen University

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Student Research Assistent • May 2016 - July 2016

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  • Establishment of burst-mode communication between the FPGA fabric and CPU subsystem, over AXI and/or DDR interface on Altera Cyclone V devices.
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Work

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Skills

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Marvell Semiconductor

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Senior Engineer• September 2019 - Present

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- Below, I listed skills I acquired during professional work or during intensive work in my free time. Besides the skills I have listed below, I - have some basic knowledge about photography and photo editting, webdesign with HTML5, CSS, and JavaScript, and server-side scripting with PHP and PostreSQL. - Furthermore I know how to sript in Linux with Perl/CSH and have basic knowledge about the Linux kernel architecture. -

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  • Design of digital logic for an automotive Ethernet product.
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Aquantia Corporation

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Member of Technical Staff II • December 2018 - September 2019

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  • (System)Verilog
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  • Linux Server configuration
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  • FPGA
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  • Design of digital logic for an automotive Ethernet product.
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Consultant• August 2017 - November 2018

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  • Development of a synthesizable layer 2 Ethernet switch in SystemC and evaluation of DV & synthesis capabilities of a high-level synthesis suite.
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  • Support and further development of the FPGA user interface and the power analysis environment which was developed during the internship.
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Intern • Nobember 2016 - July 2017

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  • RTL power analysis and reduction on various digital designs.
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  • Development of an intuitive GUI—written in Python, Tkinter, and C—to control an FPGA Ethernet debug tool.
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Boscafé 't Hijgend Hert

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Web developer and server administrator • April 2012 - November 2018

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  • Responsible for the restaurant's IT, the development of several websites, and the maintenance and security of their Linux based VPS.
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Headwaiter • September 2010 - October 2016

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  • Head of a team of about 8 waiters. Responsible for a smooth running of daily restaurant business.
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Chair for Electrical Engineering and Computer Systems, RWTH Aachen University

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Student Research Assistent • May 2016 - July 2016

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  • Establishment of burst-mode communication between the FPGA fabric and CPU subsystem on an Altera Cyclone V device.
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Skills

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+ Below, I listed skills I acquired during my professional work or during work in my free time. Besides the skills I have listed below, I have basic + knowledge about photography and photo editting, front-end web development with HTML5, CSS, and JavaScript, and back-end webdevelopment with PHP/Python and MySQL/PostgreSQL. +

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  • (System)Verilog
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  • C
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  • C++
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  • Rust
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  • Python
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  • Tkinter
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  • SystemC
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  • Matlab
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  • Linux Server configuration
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  • FPGA
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Get in Touch

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Do you have any further questions? Please don't hesitate to reach out to me!

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Get in Touch

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Do you have any further questions? Please don't hesitate to reach out to me! -

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+ + Download vCard | + Download Public PGP Key + +
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