Who am I?

Currently working as engineering consultant for Aquantia Corp. Always curious about technological innovations and therefore graduated in electrical engineering & computer science. Strives for a complete understanding of computers, from the lowest level—i.e., the bare integrated circuits—to the highest—i.e., user space—, and is therefore always eager to learn something new. Enjoys writing small programs in his free time, either to automate everyday problems, or simply for the sake of fun, and gets excited by the seemingly endless possibilities of Linux. Loves a good read, also on non-tech subjects like economics, anthropology, or (geo)politics.

Contact Details

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Education

RWTH Aachen University

M.Sc. Electrical Engineering and Computer Science• October 2015 - November 2018

  • Specialization: Micro- and Nanoelectronics
  • Final project: "Implementation and Analysis of an InfiniBand based Communication in a Real-Time Co-Simulation Framework"—An analysis and subsequent implementation of the Virtual Interface Architecture Infiniband, using the OpenStack verbs, in order to achieve high throughput and minimal latency between nodes of the real-time co-simulation framework VILLASnode.
  • Modules included: lectures on VLSI architectures, computer arithmetics, mixed analog signals, neural networks, new materials and devices in information technology, numerical device simulation, and operating systems. Lab training on VLSI design, FPGA programming in VHDL, and on the production of FeRAM cells.

RWTH Aachen University

B.Sc. Electrical Engineering and Computer Science• October 2011 - September 2015

  • Final project: “Analysis of Concepts for Power Reduction in Arithmetic Units of MAP Decoders”—A mathematical, bit accurate implementation of a decoder in MATLAB and C++, to find techniques that will potentially reduce the switching activity (and thus the power) in the arithmetic units of the decoder.

Sophianum SG. in het Heuvelland

Gymnasium• September 2005 - July 2011

  • Comparable to a university-preparatory school with Latin as additional language.

Work

Aquantia Corporation

Consultant• August 2017 - Present

  • Development of a layer 2 Ethernet switch in SystemC. The goal was to create a transmission line model to verify functionality, which could be easily translated into synthesizable code later, using a high-level synthesis suite.
  • Support and further development of the FPGA user interface and the power analysis environment which was developed during the internship.

Intern • Nobember 2016 - July 2017

  • Creation of an automated power analysis environment, build on top of Ansys' PowerArtist. Subsequently, power analysis and reduction on various digital designs was done.
  • Development of an intuitive graphical user interface, written in Python, Tkinter, and C, to access and manipulate an FPGA Ethernet debug tool.

Boscafé 't Hijgend Hert

Web developer and server administrator • April 2012 - Present

  • Responsible for the online marketing, the development of several websites and the maintenance and security of their Linux based virtual private server.

Headwaiter • September 2010 - October 2016

  • Head of a small subteam of about 8 waiters. Responsible for a smooth running of daily restaurant business.

Chair for Electrical Engineering and Computer Systems, RWTH Aachen University

Student Research Assistent • May 2016 - July 2016

  • Establishment of burst-mode communication between the FPGA fabric and CPU subsystem, over AXI and/or DDR interface on Altera Cyclone V devices.

Skills

Below, I listed skills I acquired during professional work or during intensive work in my free time. Besides the skills I have listed below, I have some basic knowledge about photography and photo editting, webdesign with HTML5, CSS, and JavaScript, and server-side scripting with PHP and PostreSQL. Furthermore I know how to sript in Linux with Perl/CSH and have basic knowledge about the Linux kernel architecture.

  • C
  • C++
  • Rust
  • Python
  • Tkinter
  • SystemC
  • (System)Verilog
  • Matlab
  • Linux Server configuration
  • FPGA

Get in Touch

Do you have any further questions? Please don't hesitate to reach out to me!

Dennis Potter

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