From 203f1e1b362ac60a9bf8e54f94bec7ca6a3b9f8d Mon Sep 17 00:00:00 2001
From: Dennis <dennis@dennispotter.eu>
Date: Sun, 16 May 2021 23:53:58 +0200
Subject: [PATCH] Add swwe and swwel properties

Note: swwe=True & swwel=True are not yet supported (since they don't
really make sense). At this point, references are (partly) supported.
---
 srdl2sv/components/component.py          | 39 ++++++++++++++++++++++++
 srdl2sv/components/field.py              | 26 +++++++++++++---
 srdl2sv/components/templates/fields.yaml |  6 ++++
 3 files changed, 66 insertions(+), 5 deletions(-)

diff --git a/srdl2sv/components/component.py b/srdl2sv/components/component.py
index 32c1e83..6498ef8 100644
--- a/srdl2sv/components/component.py
+++ b/srdl2sv/components/component.py
@@ -1,6 +1,7 @@
 import re
 from itertools import chain
 from typing import NamedTuple
+from systemrdl import node
 
 # Local modules
 from log.log import create_logger
@@ -91,3 +92,41 @@ class Component():
                 indent_lvl += 1
 
         return '\n'.join(rtl_indented)
+
+    @staticmethod
+    def get_underscored_path(path: str, owning_addrmap: str):
+        return path\
+                .replace('[]', '')\
+                .replace('{}.'.format(owning_addrmap), '')\
+                .replace('.', '_')
+
+    @staticmethod
+    def split_dimensions(path: str):
+        new_path = re.match(r'(.*?)(\[.*\])?(.*)', path)
+        return (''.join([new_path.group(1), new_path.group(3)]),
+                new_path.group(2) if new_path.group(2) else '[0]')
+
+    @staticmethod
+    def get_ref_name(obj):
+        name = []
+
+        split_name = Component.split_dimensions(
+            Component.get_underscored_path(
+                obj.get_path(),
+                obj.owning_addrmap.inst_name)
+            )
+
+        name.append(split_name[0])
+
+        if isinstance(obj, (node.FieldNode)):
+            name.append('_q')
+
+        name.append(split_name[1])
+
+        return ''.join(name)
+
+
+
+
+
+
diff --git a/srdl2sv/components/field.py b/srdl2sv/components/field.py
index 1b0c975..150ec59 100644
--- a/srdl2sv/components/field.py
+++ b/srdl2sv/components/field.py
@@ -16,7 +16,7 @@ class Field(Component):
         pkg_resources.read_text(templates, 'fields.yaml'),
         Loader=yaml.FullLoader)
 
-    def __init__(self, obj: node.RootNode, dimensions: list, config:dict):
+    def __init__(self, obj: node.FieldNode, dimensions: list, config:dict):
         super().__init__()
 
         # Save and/or process important variables
@@ -208,10 +208,26 @@ class Field(Component):
         access_rtl['sw_write'] = []
 
         if self.sw_access in (AccessType.rw, AccessType.w):
-            access_rtl['sw_write'].append(
-                Field.templ_dict['sw_access_field'].format(
-                    path_wo_field = self.path_wo_field,
-                    genvars = self.genvars_str))
+            swwe = self.obj.get_property('swwe')
+            swwel = self.obj.get_property('swwel')
+
+            if isinstance(swwe, (node.FieldNode, node.SignalNode)):
+                access_rtl['sw_write'].append(
+                    Field.templ_dict['sw_access_field_swwe'].format(
+                        path_wo_field = self.path_wo_field,
+                        genvars = self.genvars_str,
+                        swwe = Component.get_ref_name(swwe)))
+            elif isinstance(swwel, (node.FieldNode, node.SignalNode)):
+                access_rtl['sw_write'].append(
+                    Field.templ_dict['sw_access_field_swwel'].format(
+                        path_wo_field = self.path_wo_field,
+                        genvars = self.genvars_str,
+                        swwel = Component.get_ref_name(swwel)))
+            else:
+                access_rtl['sw_write'].append(
+                    Field.templ_dict['sw_access_field'].format(
+                        path_wo_field = self.path_wo_field,
+                        genvars = self.genvars_str))
 
             # Check if an onwrite property is set
             onwrite = self.obj.get_property('onwrite')
diff --git a/srdl2sv/components/templates/fields.yaml b/srdl2sv/components/templates/fields.yaml
index 32d1f4b..3c33f78 100644
--- a/srdl2sv/components/templates/fields.yaml
+++ b/srdl2sv/components/templates/fields.yaml
@@ -12,6 +12,12 @@ rst_field_assign: |-
 sw_access_field: |-
     if ({path_wo_field}_sw_wr{genvars})
     begin
+sw_access_field_swwe: |-
+    if ({path_wo_field}_sw_wr{genvars} && {swwe}) // swwe property
+    begin
+sw_access_field_swwel: |-
+    if ({path_wo_field}_sw_wr{genvars} && !{swwel}) // swwel property
+    begin
 sw_access_byte: |-
     if (byte_enable[{i}])
     begin