mirror of
https://github.com/Silicon1602/srdl2sv.git
synced 2024-12-22 15:08:39 +00:00
Add missing example RDL file 'simple_rw_reg.rdl'
This commit is contained in:
parent
abf3fac24f
commit
20cec0c2a3
33
examples/simple_rw_reg.rdl
Normal file
33
examples/simple_rw_reg.rdl
Normal file
@ -0,0 +1,33 @@
|
|||||||
|
// This RDL file contains 4 simple types of registers:
|
||||||
|
// - A 1-dimensional register
|
||||||
|
// - A 1-dimensional register that uses an enumeration
|
||||||
|
// - A 3-dimensional register
|
||||||
|
// - A 2-dimensional register with the external property set
|
||||||
|
//
|
||||||
|
// Note that no reset is defined, so none of the registers will be
|
||||||
|
// resetable.
|
||||||
|
|
||||||
|
addrmap simple_rw_reg {
|
||||||
|
// 1-D register
|
||||||
|
reg {
|
||||||
|
field {sw=rw; hw=rw; we;} f1 [15:0];
|
||||||
|
field {sw=rw; hw=rw; we;} f2 [31:16];
|
||||||
|
} register_1d;
|
||||||
|
|
||||||
|
// 1-D register with enumeration
|
||||||
|
reg {
|
||||||
|
enum example_encode {
|
||||||
|
value_1 = 16'd0;
|
||||||
|
value_2 = 16'd1;
|
||||||
|
};
|
||||||
|
|
||||||
|
field {sw=rw; hw=rw; we;} f1 [15:0];
|
||||||
|
f1->encode = example_encode;
|
||||||
|
} register_1d_enum;
|
||||||
|
|
||||||
|
// 3-D register
|
||||||
|
reg {
|
||||||
|
field {sw=rw; hw=rw; we;} f1 [15:0];
|
||||||
|
field {sw=rw; hw=rw; we;} f2 [31:16];
|
||||||
|
} register_3d[2][2];
|
||||||
|
};
|
Loading…
Reference in New Issue
Block a user