From 463bc22e12db494ca68c05d1dca74cd9292507f7 Mon Sep 17 00:00:00 2001
From: Dennis <dennis@dennispotter.eu>
Date: Tue, 19 Oct 2021 23:26:14 -0700
Subject: [PATCH] Add missing 'endgenerate' in srdl2sv_amba3ahblite.sv

---
 srdl2sv/components/widgets/srdl2sv_amba3ahblite.sv | 1 +
 1 file changed, 1 insertion(+)

diff --git a/srdl2sv/components/widgets/srdl2sv_amba3ahblite.sv b/srdl2sv/components/widgets/srdl2sv_amba3ahblite.sv
index 1d620a5..bde0b30 100644
--- a/srdl2sv/components/widgets/srdl2sv_amba3ahblite.sv
+++ b/srdl2sv/components/widgets/srdl2sv_amba3ahblite.sv
@@ -273,6 +273,7 @@ module srdl2sv_amba3ahblite
             b2r_byte_en_next = HSIZE_bitfielded << (HADDR_q % BUS_BYTES);
         end
     end
+    endgenerate
 
     /***
      * Drive interface to registers