Fix simple_rw_reg.rdl so that the test passes

The register was defined as a 64-bit register but the test was written
under the assumption it's a 32-bit register. Furthermore, the hardware
write-enable flag had to be set since all values would otherwise be
overwritten immediately.

tests/systemrdl/simple_rw_reg.rdl

@@ -1,7 +1,7 @@
 addrmap simple_rw_reg {
     reg {
-        regwidth = 64;
+        regwidth = 32;
-        field {sw=rw; hw=rw;} f1 [15:0];
+        field {sw=rw; hw=rw; we;} f1 [15:0];
-        field {sw=rw; hw=rw;} f2 [31:16];
+        field {sw=rw; hw=rw; we;} f2 [31:16];
     } register_0 [2];
 };