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Regenerate aliases example with fix from 33b6e2e

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This commit is contained in:
Dennis Potter 2021-11-07 11:38:39 -08:00
parent 33b6e2e946
commit 73dfed0146
Signed by: Dennis
GPG Key ID: 186A8AD440942BAF
1 changed files with 11 additions and 1 deletions
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12
examples/aliases/srdl2sv_out/aliases.sv
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@ -20,7 +20,7 @@
* *
* Generation information: * Generation information:
* - User: : dpotter * - User: : dpotter
* - Time : November 07 2021 11:16:51 * - Time : November 07 2021 11:34:07
* - Path : /home/dpotter/srdl2sv/examples/aliases * - Path : /home/dpotter/srdl2sv/examples/aliases
* - RDL file : ['aliases.rdl'] * - RDL file : ['aliases.rdl']
* - Hostname : ArchXPS * - Hostname : ArchXPS
@ -508,8 +508,10 @@ assign event1_for_dv_err_mux_in = !((widget_if.r_vld && (widget_if.byte_en[0]))
This is a register with 4 fields. This is a register with 4 fields.
/*******************************************************************/ /*******************************************************************/
logic four_field_reg_active ; logic four_field_reg_active ;
logic four_field_reg_sw_rd ;
logic four_field_reg_sw_wr ; logic four_field_reg_sw_wr ;
logic two_field_alias_active ; logic two_field_alias_active ;
logic two_field_alias_sw_rd ;
logic two_field_alias_sw_wr ; logic two_field_alias_sw_wr ;
logic four_field_reg__any_alias_sw_wr; logic four_field_reg__any_alias_sw_wr;
logic [31:0] four_field_reg_data_mux_in ; logic [31:0] four_field_reg_data_mux_in ;
@ -526,10 +528,12 @@ logic [7:0] four_field_reg__f4_q ;
// Register-activation for 'four_field_reg' // Register-activation for 'four_field_reg'
assign four_field_reg_active = widget_if.addr == 8; assign four_field_reg_active = widget_if.addr == 8;
assign four_field_reg_sw_rd = four_field_reg_active && widget_if.r_vld;
assign four_field_reg_sw_wr = four_field_reg_active && widget_if.w_vld; assign four_field_reg_sw_wr = four_field_reg_active && widget_if.w_vld;
// Register-activation for 'two_field_alias' (alias) // Register-activation for 'two_field_alias' (alias)
assign two_field_alias_active = widget_if.addr == 12; assign two_field_alias_active = widget_if.addr == 12;
assign two_field_alias_sw_rd = two_field_alias_active && widget_if.r_vld;
assign two_field_alias_sw_wr = two_field_alias_active && widget_if.w_vld; assign two_field_alias_sw_wr = two_field_alias_active && widget_if.w_vld;
// Combined register activation. These will become active on // Combined register activation. These will become active on
@ -653,6 +657,12 @@ begin
four_field_reg__f4_q[7:0] <= four_field_reg__f4_q[7:0] & ~widget_if.w_data[31:24]; four_field_reg__f4_q[7:0] <= four_field_reg__f4_q[7:0] & ~widget_if.w_data[31:24];
end end
else else
if (four_field_reg_sw_rd)
begin
if (widget_if.byte_en[3]) // rclr property
four_field_reg__f4_q[7:0] <= 8'b0;
end
else
if (!four_field_reg__f4_hw_wr) if (!four_field_reg__f4_hw_wr)
four_field_reg__f4_q <= four_field_reg__f4_in; four_field_reg__f4_q <= four_field_reg__f4_in;
end // of four_field_reg__f4's always_ff end // of four_field_reg__f4's always_ff