From eb3f1dd57e7444b2408eadada7906c4fc7647cf9 Mon Sep 17 00:00:00 2001 From: Dennis Date: Sun, 24 Oct 2021 23:17:47 -0700 Subject: [PATCH] Resolve UnboundLocalError bug when SignalNodes are instantiated This happened in AddrMap and RegFile because a the width of a new variable 'new_child' is performed. However, SignalNodes will not create such a child. --- srdl2sv/components/addrmap.py | 4 +++- srdl2sv/components/regfile.py | 2 +- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/srdl2sv/components/addrmap.py b/srdl2sv/components/addrmap.py index c392e53..e4c06e1 100644 --- a/srdl2sv/components/addrmap.py +++ b/srdl2sv/components/addrmap.py @@ -54,6 +54,7 @@ class AddrMap(Component): # Traverse through children for child in self.obj.children(): + print(child) if isinstance(child, node.AddrmapNode): # This addressmap opens a completely new scope. For example, # a field_reset does not propagate through to this scope. @@ -76,6 +77,7 @@ class AddrMap(Component): new_child.sanity_checks() self.mems[child.inst_name] = new_child elif isinstance(child, node.RegNode): + print('here') if child.inst.is_alias: # If the node we found is an alias, we shall not create a # new register. Rather, we bury up the old register and add @@ -94,7 +96,7 @@ class AddrMap(Component): try: if (regwidth := new_child.get_regwidth()) > self.regwidth: self.regwidth = regwidth - except KeyError: + except (KeyError, UnboundLocalError): # Simply ignore nodes like SignalNodes pass diff --git a/srdl2sv/components/regfile.py b/srdl2sv/components/regfile.py index 7af00ec..359abcc 100644 --- a/srdl2sv/components/regfile.py +++ b/srdl2sv/components/regfile.py @@ -85,7 +85,7 @@ class RegFile(Component): try: if (regwidth := new_child.get_regwidth()) > self.regwidth: self.regwidth = regwidth - except KeyError: + except (KeyError, UnboundLocalError): # Simply ignore nodes like SignalNodes pass