mirror of
https://github.com/Silicon1602/srdl2sv.git
synced 2024-12-22 06:58:41 +00:00
Add missing 'endmodule' keyword to addrmap
This commit is contained in:
parent
22f88efcd8
commit
ee20126da6
@ -140,6 +140,9 @@ class AddrMap(Component):
|
||||
outputs = '\n'.join(output_ports_rtl)))
|
||||
|
||||
|
||||
# Add endmodule keyword
|
||||
self.rtl_footer.append('endmodule')
|
||||
|
||||
def __process_global_resets(self):
|
||||
field_reset_list = \
|
||||
[x for x in self.obj.signals() if x.get_property('field_reset')]
|
||||
|
Loading…
Reference in New Issue
Block a user