79 lines
2.5 KiB
Plaintext
79 lines
2.5 KiB
Plaintext
addrmap counters {
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desc =
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"This addressmap shows of different counter properties
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that SystemRDL offers and can be used in the register blocks.";
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signal {activelow; async; field_reset;} rst_async_n;
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reg {
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field {sw = rw; hw = na;} threshold [31:0] = 32'hffffffff;
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} counter_a_threshold;
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reg {
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desc = "Saturating counter that can be cleared when software writes to
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the field, has a configurable counter, and can increment and
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decrement.
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When you want a purely incrementing or decrementing counter, set
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incrval/decrval to 0.";
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field {
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sw = rw;
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onwrite = wclr;
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counter = true;
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hwclr = true;
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incrsaturate = true; // Counter saturates at 2**32-1
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decrsaturate = true; // Counter saturates at 0
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overflow = true; // Generate a signal that tells if the counter overflows
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} cnt [31:0] = 0;
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} counter_a;
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// Define a custom threshold value
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counter_a.cnt->threshold = counter_a_threshold.threshold;
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regfile {
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desc = "This regfile implements a 64-bit non-saturating counter
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that will fire an interrupt as soon as it wraps around.";
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reg {
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field {
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sw = rw;
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onwrite = wclr;
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counter = true;
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decrvalue = 0;
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overflow = true; // Generate a signal that tells if the counter overflows
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} cnt [31:0] = 0;
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} counter_b_lsb;
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reg {
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field {
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sw = rw;
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onwrite = wclr;
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counter = true;
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decrvalue = 0;
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overflow = true; // Generate a signal that tells if the counter overflows
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} cnt [31:0] = 0;
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} counter_b_msb;
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// Daisy-chain
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counter_b_msb.cnt->incr = counter_b_lsb.cnt->overflow;
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} wide_counters [2]; // Mutlidimensionality supported
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reg {
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field {
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desc = "Interrupt if the msb-part of counter_b[2] overflowed.";
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level intr;
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} ovrflw_1 = 0;
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field {
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desc = "Interrupt if the msb-part of counter_b[2] overflowed.";
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level intr;
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} ovrflw_0 = 0;
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} counter_b_overflow_intr;
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counter_b_overflow_intr.ovrflw_0->next = wide_counters[0].counter_b_msb.cnt->overflow;
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counter_b_overflow_intr.ovrflw_1->next = wide_counters[1].counter_b_msb.cnt->overflow;
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};
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