srdl2sv/srdl2sv
2021-08-15 12:56:41 -07:00
..
cli Add header with license and generation information to addrmap 2021-06-26 11:37:56 +02:00
components Add underflow property and checker if referenced properties exist 2021-08-15 12:56:41 -07:00
log Fundamental changes to the architecture of component classes 2021-05-15 00:29:59 +02:00
__init__.py Initial commit of SRDL2SV 2021-05-02 00:58:43 +02:00
main.py Add bus_clk/bus_rst_n ports to widget (rather than (only) reg_clk) 2021-06-25 11:50:06 +02:00