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mirror of https://github.com/Silicon1602/srdl2sv.git synced 2025-04-29 16:22:56 +00:00
Dennis 6719d21423
Fix simple_rw_reg.rdl so that the test passes
The register was defined as a 64-bit register but the test was written
under the assumption it's a 32-bit register. Furthermore, the hardware
write-enable flag had to be set since all values would otherwise be
overwritten immediately.
2021-10-24 15:43:44 -07:00
..