mirror of
https://github.com/Silicon1602/srdl2sv.git
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64 lines
1.8 KiB
Plaintext
64 lines
1.8 KiB
Plaintext
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addrmap aliases {
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///////////////////////////
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// Example SystemRDL LRM //
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///////////////////////////
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reg some_intr_r {
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desc = "This register shows the alias example from Section 10.5.2 of the
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SystemRDL2.0 spec (with some slight adaptations to make it compilable).";
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field {
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level intr;
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hw=w;
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sw=rw;
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woclr;
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} some_event;
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};
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some_intr_r event1;
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// Create an alias for the DV team to use and modify its properties
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// so that DV can force interrupt events and allow more rigorous structural
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// testing of the interrupt.
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alias event1 some_intr_r event1_for_dv;
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event1_for_dv.some_event->woset = true;
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//////////////////////////
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// Example field-subset //
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//////////////////////////
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field field_templ {
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sw = rw;
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hw = rw;
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wel;
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};
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reg four_field_reg {
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desc = "This is a register with 4 fields.";
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field_templ f1 [7:0];
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field_templ f2 [15:8];
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field_templ f3 [23:16];
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field_templ f4 [31:24];
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f3->swmod = true; // swmod does work for aliased registers
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f4->rclr = true; // Show rclr feature
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};
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reg two_field_alias {
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desc = "It is not mandatory that aliases have all fields of the original
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register. A subset of the fields can be made accessible and they
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can have different names.";
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field_templ field_1 [7:0];
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// Removed f2
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// Removed f3
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field_templ field_4 [31:24];
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field_4->woclr = true; // Different option compared to four_field_reg.f1
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};
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four_field_reg four_field_reg; // Actual register
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alias four_field_reg two_field_alias two_field_alias; // Alias with different properties
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};
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