Add support for external registers

Every single field and every single alias (!) has its own
interface to the surrounding hardware. This is required
to give users the maximum amount of freedom when defining
certain properties in RDL.

tests/external_registers.rdl

@@ -0,0 +1,46 @@
+addrmap external_registers {
+
+    reg {
+        field {} f1 [15:0];
+        field {} f2 [31:16];
+        f2->sw = w;
+    } reg_int0;
+    
+    // The registers below shall not be implemented by RTL that is
+    // generated by srdl2sv but rather, the tool shall provide an
+    // interface to communicate with the bus.
+    external reg {
+        field {} f1 [15:0];
+        field {} f2 [31:16];
+        f2->sw = w;
+    } reg_ext0;
+    
+    // Multi-dimensional registers must work
+    external reg {
+        field {} f1 [15:0];
+        field {} f2 [31:20];
+        f2->sw = w;
+    } reg_ext1 [2];
+
+    external reg {
+        field {} f1 [14:3];
+        field {} f2 [31:20];
+        f1->sw = rw;
+        f2->sw = rw;
+    } reg_ext2 [2];
+
+    // Add an alias to verify that alias capabilities work fine for
+    // external registers
+    reg reg_ext2_alias_t {
+        field {} f1 [14:3];
+        f1->sw = rw;
+    };
+
+    external alias reg_ext2 reg_ext2_alias_t reg_ext2_alias;
+
+    reg {
+        field {} f1 [15:0];
+        field {} f2 [31:16];
+        f2->sw = w;
+    } reg_int1 [2];
+};