Closes #10: sw read/write side-effects now honor byte-enables if enabled
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22a822c097
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186A8AD440942BAF
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@ -139,22 +139,9 @@ class Field(Component):
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)
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# Check if an onwrite property is set
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onwrite = obj.get_property('onwrite')
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if onwrite:
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if onwrite == OnWriteType.wuser:
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self.logger.warning("The OnWriteType.wuser is not yet supported!")
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elif onwrite in (OnWriteType.wclr, OnWriteType.wset):
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access_rtl['sw_write'][0].append(
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self._process_yaml(
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Field.templ_dict[str(onwrite)],
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{'path': path_underscored,
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'genvars': self.genvars_str,
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'width': obj.width,
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'path_wo_field': path_wo_field,
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'field_type': self.field_type}
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)
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)
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if onwrite := obj.get_property('onwrite'):
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if onwrite is OnWriteType.wuser:
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self.logger.error("The OnWriteType.wuser is not yet supported!")
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else:
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# If field spans multiple bytes, every byte shall have a seperate enable!
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for i in range(self.lsbyte, self.msbyte+1):
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@ -167,7 +154,7 @@ class Field(Component):
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{'path': path_underscored,
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'genvars': self.genvars_str,
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'i': i,
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'width': obj.width,
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'width': msb_bus - lsb_bus + 1,
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'msb_bus': str(msb_bus),
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'lsb_bus': str(lsb_bus),
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'msb_field': str(msb_bus-obj.inst.lsb),
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@ -216,14 +203,30 @@ class Field(Component):
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access_rtl['sw_read'][0].append(
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self._process_yaml(
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Field.templ_dict[str(onread)],
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{'width': obj.width,
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'path': path_underscored,
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Field.templ_dict['sw_read_access_field'],
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{'path_wo_field': path_wo_field,
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'genvars': self.genvars_str,
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'path_wo_field': path_wo_field}
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'field_type': self.field_type}
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)
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)
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# If field spans multiple bytes, every byte shall have a seperate enable!
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for i in range(self.lsbyte, self.msbyte+1):
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access_rtl['sw_read'][0].append(
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self._process_yaml(
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Field.templ_dict[str(onread)],
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{'path': path_underscored,
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'genvars': self.genvars_str,
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'i': i,
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'width': msb_bus - lsb_bus + 1,
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'msb_field': str(msb_bus-obj.inst.lsb),
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'lsb_field': str(lsb_bus-obj.inst.lsb),
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}
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)
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)
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access_rtl['sw_read'][0].append("end")
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# Add singlepulse property
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# Property cannot be overwritten by alias
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if obj.get_property('singlepulse'):
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@ -133,52 +133,61 @@ end_field_ff:
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OnWriteType.woset:
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rtl: |-
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if (widget_if.byte_en[{i}]) // woset property
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begin
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<<INDENT>>
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{path}_q{genvars}[{msb_field}:{lsb_field}] <= {path}_q{genvars}[{msb_field}:{lsb_field}] | widget_if.w_data[{msb_bus}:{lsb_bus}];
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end
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<<UNINDENT>>
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OnWriteType.woclr:
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rtl: |-
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if (widget_if.byte_en[{i}]) // woclr property
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begin
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<<INDENT>>
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{path}_q{genvars}[{msb_field}:{lsb_field}] <= {path}_q{genvars}[{msb_field}:{lsb_field}] & ~widget_if.w_data[{msb_bus}:{lsb_bus}];
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end
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<<UNINDENT>>
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OnWriteType.wot:
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rtl: |-
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if (widget_if.byte_en[{i}]) // wot property
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begin
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<<INDENT>>
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{path}_q{genvars}[{msb_field}:{lsb_field}] <= {path}_q{genvars}[{msb_field}:{lsb_field}] ^ widget_if.w_data[{msb_bus}:{lsb_bus}];
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end
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<<UNINDENT>>
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OnWriteType.wzs:
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rtl: |-
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if (widget_if.byte_en[{i}]) // wzs property
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begin
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<<INDENT>>
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{path}_q{genvars}[{msb_field}:{lsb_field}] <= {path}_q{genvars}[{msb_field}:{lsb_field}] & widget_if.w_data[{msb_bus}:{lsb_bus}];
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end
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<<UNINDENT>>
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OnWriteType.wzt:
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rtl: |-
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if (widget_if.byte_en[{i}]) // wzt property
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begin
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<<INDENT>>
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{path}_q{genvars}[{msb_field}:{lsb_field}] <= {path}_q{genvars}[{msb_field}:{lsb_field}] ~^ widget_if.w_data[{msb_bus}:{lsb_bus}];
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end
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<<UNINDENT>>
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OnWriteType.wclr:
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rtl: |-
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{path}_q{genvars} <= {{{width}{{1'b0}}}};
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if (widget_if.byte_en[{i}]) // wclr property
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<<INDENT>>
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{path}_q{genvars}[{msb_field}:{lsb_field}] <= {width}'b0;
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<<UNINDENT>>
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OnWriteType.wset:
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rtl: |-
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{path}_q{genvars} <= {{{width}{{1'b1}}}};
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if (widget_if.byte_en[{i}]) // wclr property
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<<INDENT>>
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{path}_q{genvars}[{msb_field}:{lsb_field}] <= {{{width}{{1'b1}}}};
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<<UNINDENT>>
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sw_read_access_field:
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rtl: |-
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if ({path_wo_field}_sw_rd{genvars})
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begin
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OnReadType.rclr:
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rtl: |-
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if ({path_wo_field}_sw_rd{genvars}) // rclr property
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begin
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{path}_q{genvars} <= {{{width}{{1'b0}}}};
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end
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if (widget_if.byte_en[{i}]) // rclr property
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<<INDENT>>
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{path}_q{genvars}[{msb_field}:{lsb_field}] <= {width}'b0;
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<<UNINDENT>>
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OnReadType.rset:
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rtl: |-
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if ({path_wo_field}_sw_rd{genvars}) // rset property
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begin
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{path}_q{genvars} <= {{{width}{{1'b1}}}};
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end
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if (widget_if.byte_en[{i}]) // rset property
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<<INDENT>>
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{path}_q{genvars}[{msb_field}:{lsb_field}] <= {{{width}{{1'b1}}}};
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<<UNINDENT>>
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field_comment:
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rtl: |-
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