Add module description to test_simple_rw_reg.py

This commit is contained in:
Dennis Potter 2021-10-31 19:43:14 -07:00
parent 247f1a7575
commit f0f2ef3d78
Signed by: Dennis
GPG Key ID: 186A8AD440942BAF
1 changed files with 17 additions and 2 deletions

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@ -1,8 +1,23 @@
from enum import Enum """Simple test that reads and writes to sw=rw/hw=rw register
This test performs four different tests on a single sw=rw/hw=rw
register with two fields:
- Test AHB write and subsequent read-access.
Registers are 32-bit wide and writes/reads
are performed in 1, 2, and 4B steps.
- Test that if hardware sets a value to the
registers this can be read out over the CPU bus
- Test that if hardware writes something but the
write-enable is inactive the value is not written.
- Test if accessing illegal addresses results in an
error response.
"""
import random
from cocotb.clock import Clock from cocotb.clock import Clock
from cocotb.triggers import RisingEdge from cocotb.triggers import RisingEdge
import cocotb import cocotb
import random
from libs import AMBA3AHBLiteDriver from libs import AMBA3AHBLiteDriver