srdl2sv/examples/simple_rw_reg
2021-10-31 16:01:44 -07:00
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srdl2sv_out Update examples with changes from a43cd2e (issue #7) 2021-10-31 16:01:44 -07:00
simple_rw_reg.rdl Add simple example with 1-D, 2-D, and 3-D registers 2021-10-20 22:34:37 -07:00