Dennis
/
srdl2sv
mirror of https://github.com/Silicon1602/srdl2sv.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
srdl2sv/srdl2sv/components/templates/addrmap.sv

10 lines
99 B
Systemverilog
Raw Blame History

module {addrmap_name} (
{bus_io}
{io_list}
);
{bus_widget}
{registers}
endmodule
Reference in New Issue View Git Blame Copy Permalink