asicfpgahardware-description-languagehdlrdlregister-description-languageregisterssystemrdlsystemrdl-compilersystemverilogverilog
Dennis Potter
861a020aff
The compiler in this commit is still useless and only contains a very rough skeleton of the code. SRDL2SV is only able to create a simple register with hw=rw/sw=rw fields. |
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srdl2sv | ||
.gitignore | ||
LIMITATIONS.md |