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srdl2sv
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Closes #11: Add flag to turn off error-response on illegal addresses

This commit is contained in:
Dennis Potter 2021-11-06 10:25:32 -07:00
parent fc26817c33
commit 85598af11e
Signed by: Dennis
GPG Key ID: 186A8AD440942BAF
3 changed files with 84 additions and 71 deletions
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12
README.md
View File

@ -122,8 +122,8 @@ The following bus protocols are planned at this point:
# Help function # Help function
A comprehensive help function of the tool can be invoked by running `srdl2sv --help`. A comprehensive help function of the tool can be invoked by running `srdl2sv --help`.
``` ```
usage: srdl2sv [-h] [-a ADDRESS_WIDTH] [-b {simple,amba3ahblite}] [-c DESCRIPTIONS] sage: srdl2sv [-h] [-a ADDRESS_WIDTH] [-b {simple,amba3ahblite}] [-d DESCRIPTIONS]
[-d SEARCH_PATHS [SEARCH_PATHS ...]] [-e] [-s SEARCH_PATHS [SEARCH_PATHS ...]] [--no-enums] [--no-address-errors] [--no-unpacked]
[--file-logging {DEBUG,INFO,WARNING,ERROR,CRITICAL,NONE}] [--file-logging {DEBUG,INFO,WARNING,ERROR,CRITICAL,NONE}]
[--stdout-logging {DEBUG,INFO,WARNING,ERROR,CRITICAL,NONE}] [--no-byte-enable] [--stdout-logging {DEBUG,INFO,WARNING,ERROR,CRITICAL,NONE}] [--no-byte-enable]
[-o OUT_DIR] [-r] [--real-tabs] [--tab-width TAB_WIDTH] [-o OUT_DIR] [-r] [--real-tabs] [--tab-width TAB_WIDTH]
@ -143,13 +143,15 @@ optional arguments:
Set the bus protocol that shall be used by software to communicate with the Set the bus protocol that shall be used by software to communicate with the
registers. If just a simple interface to the registers is needed, use the registers. If just a simple interface to the registers is needed, use the
'simple' protocol. (default: amba3ahblite) 'simple' protocol. (default: amba3ahblite)
-c DESCRIPTIONS, --descriptions DESCRIPTIONS -d DESCRIPTIONS, --descriptions DESCRIPTIONS
Include descriptions of addrmaps (+16), regfiles (+8), memories (+4) registers Include descriptions of addrmaps (+16), regfiles (+8), memories (+4) registers
(+2), and fields (+1) in RTL. This is a bitfield. (+2), and fields (+1) in RTL. This is a bitfield.
-d SEARCH_PATHS [SEARCH_PATHS ...], --search-paths SEARCH_PATHS [SEARCH_PATHS ...] -s SEARCH_PATHS [SEARCH_PATHS ...], --search-paths SEARCH_PATHS [SEARCH_PATHS ...]
Point to one (or more) directories that will be searched for RDL files. Point to one (or more) directories that will be searched for RDL files.
-e, --no-enums Disable enumeration generation. This will prevent the compiler from generating --no-enums Disable enumeration generation. This will prevent the compiler from generating
packages and it will prevent it from using enums in the port list. packages and it will prevent it from using enums in the port list.
--no-address-errors Disable an error response when illegal addresses are accessed.
--no-unpacked Disable unpacked arrays in the module's I/O interface.
--file-logging {DEBUG,INFO,WARNING,ERROR,CRITICAL,NONE} --file-logging {DEBUG,INFO,WARNING,ERROR,CRITICAL,NONE}
Set verbosity level of output to log-file. When set to 'NONE', nothing will be Set verbosity level of output to log-file. When set to 'NONE', nothing will be
printed to the shell. (default: NONE) printed to the shell. (default: NONE)

16
srdl2sv/cli/cli.py
View File

@ -41,7 +41,7 @@ class CliArguments():
(default: %(default)s)") (default: %(default)s)")
self.parser.add_argument( self.parser.add_argument(
"-c", "-d",
"--descriptions", "--descriptions",
type=int, type=int,
default=0, default=0,
@ -49,7 +49,7 @@ class CliArguments():
registers (+2), and fields (+1) in RTL. This is a bitfield.") registers (+2), and fields (+1) in RTL. This is a bitfield.")
self.parser.add_argument( self.parser.add_argument(
"-d", "-s",
"--search-paths", "--search-paths",
type=str, type=str,
nargs="+", nargs="+",
@ -57,7 +57,6 @@ class CliArguments():
be searched for RDL files.") be searched for RDL files.")
self.parser.add_argument( self.parser.add_argument(
"-e",
"--no-enums", "--no-enums",
action="store_true", action="store_true",
help="Disable enumeration generation. This will prevent the\ help="Disable enumeration generation. This will prevent the\
@ -65,7 +64,12 @@ class CliArguments():
it from using enums in the port list.") it from using enums in the port list.")
self.parser.add_argument( self.parser.add_argument(
"-u", "--no-address-errors",
action="store_true",
help="Disable an error response when illegal addresses are \
accessed.")
self.parser.add_argument(
"--no-unpacked", "--no-unpacked",
action="store_true", action="store_true",
help="Disable unpacked arrays in the module's I/O interface.") help="Disable unpacked arrays in the module's I/O interface.")
@ -177,6 +181,10 @@ class CliArguments():
config['enums'] = not args.no_enums config['enums'] = not args.no_enums
config['list_args'].append(f"Enums Enabled : {config['enums']}") config['list_args'].append(f"Enums Enabled : {config['enums']}")
# Set enums
config['illegal_addresses'] = not args.no_address_errors
config['list_args'].append(f"Address Errors : {config['illegal_addresses']}")
# Set unpacked arrays # Set unpacked arrays
config['unpacked_arrays'] = not args.no_unpacked config['unpacked_arrays'] = not args.no_unpacked
config['list_args'].append(f"Unpacked I/Os : {config['enums']}") config['list_args'].append(f"Unpacked I/Os : {config['enums']}")

127
srdl2sv/components/register.py
View File

@ -215,85 +215,88 @@ class Register(Component):
# an error. # an error.
# #
# Furthermore, consider an error indication that is set for external registers # Furthermore, consider an error indication that is set for external registers
wdgt_str = 'widget_if.byte_en' if self.config['illegal_addresses']:
wdgt_str = 'widget_if.byte_en'
bytes_read_format = [] bytes_read_format = []
bytes_read_sorted = sorted(bytes_read, reverse = True) bytes_read_sorted = sorted(bytes_read, reverse = True)
try: try:
prev = msb = bytes_read_sorted[0] prev = msb = bytes_read_sorted[0]
except IndexError: except IndexError:
# Do nothing. bytes_written simply didn't exist # Do nothing. bytes_written simply didn't exist
# The loop below will simply not be entered # The loop below will simply not be entered
pass pass
for i in bytes_read_sorted[0:]: for i in bytes_read_sorted[0:]:
if prev - i > 1: if prev - i > 1:
bytes_read_format.append( bytes_read_format.append(
f"|{wdgt_str}[{msb}:{prev}]" if msb > prev else f"{wdgt_str}[{msb}]") f"|{wdgt_str}[{msb}:{prev}]" if msb > prev else f"{wdgt_str}[{msb}]")
msb = i msb = i
if i == bytes_read_sorted[-1]: if i == bytes_read_sorted[-1]:
bytes_read_format.append( bytes_read_format.append(
f"|{wdgt_str}[{msb}:{i}]" if msb > i else f"{wdgt_str}[{msb}]") f"|{wdgt_str}[{msb}:{i}]" if msb > i else f"{wdgt_str}[{msb}]")
prev = i prev = i
bytes_written_format = [] bytes_written_format = []
bytes_written_sorted = sorted(bytes_written, reverse = True) bytes_written_sorted = sorted(bytes_written, reverse = True)
try: try:
prev = msb = bytes_written_sorted[0] prev = msb = bytes_written_sorted[0]
except IndexError: except IndexError:
# Do nothing. bytes_written simply didn't exist # Do nothing. bytes_written simply didn't exist
# The loop below will simply not be entered # The loop below will simply not be entered
pass pass
for i in bytes_written_sorted[0:]: for i in bytes_written_sorted[0:]:
if prev - i > 1: if prev - i > 1:
bytes_written_format.append( bytes_written_format.append(
f"|{wdgt_str}[{msb}:{prev}]" if msb > prev else f"{wdgt_str}[{msb}]") f"|{wdgt_str}[{msb}:{prev}]" if msb > prev else f"{wdgt_str}[{msb}]")
msb = i msb = i
if i == bytes_written_sorted[-1]: if i == bytes_written_sorted[-1]:
bytes_written_format.append( bytes_written_format.append(
f"|{wdgt_str}[{msb}:{i}]" if msb > i else f"{wdgt_str}[{msb}]") f"|{wdgt_str}[{msb}:{i}]" if msb > i else f"{wdgt_str}[{msb}]")
prev = i prev = i
# Parse mux error-input # Parse mux error-input
sw_err_condition_vec = [] sw_err_condition_vec = []
sw_err_condition_vec.append(self._process_yaml( sw_err_condition_vec.append(self._process_yaml(
Register.templ_dict['sw_err_condition'], Register.templ_dict['sw_err_condition'],
{'rd_byte_list_ored': {'rd_byte_list_ored':
' || '.join(bytes_read_format) if bytes_read else "1'b0", ' || '.join(bytes_read_format) if bytes_read else "1'b0",
'wr_byte_list_ored': 'wr_byte_list_ored':
' || '.join(bytes_written_format) if bytes_written else "1'b0"} ' || '.join(bytes_written_format) if bytes_written else "1'b0"}
)
) )
)
if self.config['external']: if self.config['external']:
if bytes_read: if bytes_read:
for field in self.children.values(): for field in self.children.values():
sw_err_condition_vec.append(self._process_yaml( sw_err_condition_vec.append(self._process_yaml(
Register.templ_dict['external_err_condition'], Register.templ_dict['external_err_condition'],
{'path': '__'.join([na_map[0], field.name]), {'path': '__'.join([na_map[0], field.name]),
'genvars': self.genvars_str, 'genvars': self.genvars_str,
'rd_or_wr': 'r'} 'rd_or_wr': 'r'}
)
) )
)
if bytes_written: if bytes_written:
for field in self.children.values(): for field in self.children.values():
sw_err_condition_vec.append(self._process_yaml( sw_err_condition_vec.append(self._process_yaml(
Register.templ_dict['external_err_condition'], Register.templ_dict['external_err_condition'],
{'path': '__'.join([na_map[0], field.name]), {'path': '__'.join([na_map[0], field.name]),
'genvars': self.genvars_str, 'genvars': self.genvars_str,
'rd_or_wr': 'w'} 'rd_or_wr': 'w'}
)
) )
)
sw_err_condition = ' || '.join(sw_err_condition_vec) sw_err_condition = ' || '.join(sw_err_condition_vec)
else:
sw_err_condition = "1'b0"
# If registers are implemented in RTL, they will be ready immediately. However, # If registers are implemented in RTL, they will be ready immediately. However,
# if they are defined as 'external', there might be some delay # if they are defined as 'external', there might be some delay