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Fix widths in OnWrite and OnRead properties

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This commit is contained in:
Dennis Potter 2021-06-03 16:11:58 +02:00
parent ee20126da6
commit ec492d619a
Signed by: Dennis
GPG Key ID: 186A8AD440942BAF
2 changed files with 7 additions and 4 deletions
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3
srdl2sv/components/field.py
View File

@ -310,6 +310,7 @@ class Field(Component):
Field.templ_dict[str(onwrite)]['rtl'].format( Field.templ_dict[str(onwrite)]['rtl'].format(
path = self.path_underscored, path = self.path_underscored,
genvars = self.genvars_str, genvars = self.genvars_str,
width = self.obj.width,
path_wo_field = self.path_wo_field path_wo_field = self.path_wo_field
) )
) )
@ -321,6 +322,7 @@ class Field(Component):
path = self.path_underscored, path = self.path_underscored,
genvars = self.genvars_str, genvars = self.genvars_str,
i = i, i = i,
width = self.obj.width,
msb_bus = str(8*(i+1)-1 if i != self.msbyte else self.obj.msb), msb_bus = str(8*(i+1)-1 if i != self.msbyte else self.obj.msb),
bus_w = str(8 if i != self.msbyte else self.obj.width-(8*j)), bus_w = str(8 if i != self.msbyte else self.obj.width-(8*j)),
msb_field = str(8*(j+1)-1 if i != self.msbyte else self.obj.width-1), msb_field = str(8*(j+1)-1 if i != self.msbyte else self.obj.width-1),
@ -350,6 +352,7 @@ class Field(Component):
else: else:
access_rtl['sw_read'][0].append( access_rtl['sw_read'][0].append(
Field.templ_dict[str(onread)]['rtl'].format( Field.templ_dict[str(onread)]['rtl'].format(
width = self.obj.width,
path = self.path_underscored, path = self.path_underscored,
genvars = self.genvars_str, genvars = self.genvars_str,
path_wo_field = self.path_wo_field path_wo_field = self.path_wo_field

8
srdl2sv/components/templates/fields.yaml
View File

@ -86,21 +86,21 @@ OnWriteType.wzt:
end end
OnWriteType.wclr: OnWriteType.wclr:
rtl: |- rtl: |-
{path}_q{genvars} <= {{width{{1'b0}}}}; {path}_q{genvars} <= {{{width}{{1'b0}}}};
OnWriteType.wset: OnWriteType.wset:
rtl: |- rtl: |-
{path}_q{genvars} <= {{width{{1'b1}}}}; {path}_q{genvars} <= {{{width}{{1'b1}}}};
OnReadType.rclr: OnReadType.rclr:
rtl: |- rtl: |-
if ({path_wo_field}_sw_rd{genvars}) // rclr property if ({path_wo_field}_sw_rd{genvars}) // rclr property
begin begin
{path}_q{genvars} <= {{width{{1'b0}}}}; {path}_q{genvars} <= {{{width}{{1'b0}}}};
end end
OnReadType.rset: OnReadType.rset:
rtl: |- rtl: |-
if ({path_wo_field}_sw_rd{genvars}) // rset property if ({path_wo_field}_sw_rd{genvars}) // rset property
begin begin
{path}_q{genvars} <= {{width{{1'b1}}}}; {path}_q{genvars} <= {{{width}{{1'b1}}}};
end end
field_comment: field_comment: