Dennis/srdl2sv
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Dennis 203f1e1b36
Add swwe and swwel properties 
Note: swwe=True & swwel=True are not yet supported (since they don't
really make sense). At this point, references are (partly) supported.
2021-05-16 23:53:58 +02:00
srdl2sv
Add swwe and swwel properties
2021-05-16 23:53:58 +02:00
.gitignore
Initial commit of SRDL2SV
2021-05-02 00:58:43 +02:00
LIMITATIONS.md
Initial commit of SRDL2SV
2021-05-02 00:58:43 +02:00
Description
A SystemRDL 2.0 to (synthesizable) SystemVerilog compiler.
asicfpgahardware-description-languagehdlrdlregister-description-languageregisterssystemrdlsystemrdl-compilersystemverilogverilog
713 KiB
Languages
Python 92.9%
SystemVerilog 5.7%
Makefile 1.4%