mirror of
https://github.com/Silicon1602/srdl2sv.git
synced 2025-07-01 22:12:24 +00:00
Dennis
861a020aff
The compiler in this commit is still useless and only contains a very rough skeleton of the code. SRDL2SV is only able to create a simple register with hw=rw/sw=rw fields.
3 lines
205 B
Markdown
3 lines
205 B
Markdown
- Depth of an array is limited to X
|
|
- [Any limitations to the systemrdl-compiler](https://systemrdl-compiler.readthedocs.io/en/latest/known_issues.html) also apply to the SystemRDL2SystemVerilog compiler.
|