Add missing 'endgenerate' in srdl2sv_amba3ahblite.sv

2021-10-19 23:26:14 -07:00 · 2021-10-19 23:26:14 -07:00 · 463bc22e12
parent 5e47ff664a
commit 463bc22e12
1 changed files with 1 additions and 0 deletions
--- a/srdl2sv/components/widgets/srdl2sv_amba3ahblite.sv
+++ b/srdl2sv/components/widgets/srdl2sv_amba3ahblite.sv
@ -273,6 +273,7 @@ module srdl2sv_amba3ahblite
            b2r_byte_en_next = HSIZE_bitfielded << (HADDR_q % BUS_BYTES);
        end
    end
+    endgenerate

    /***
     * Drive interface to registers