Dennis/srdl2sv
1
0
Fork 0
mirror of https://github.com/Silicon1602/srdl2sv.git synced 2024-12-22 15:08:39 +00:00
Code Issues Projects Releases Wiki Activity

Flops must not update when HREADYOUT == 0, not when r2b.rdy == 0

Browse Source
This commit is contained in:
Dennis Potter 2021-09-13 21:52:35 -07:00
parent a27b57009b
commit 85aa2f903c
Signed by: Dennis
GPG Key ID: 186A8AD440942BAF
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
srdl2sv/components/widgets/srdl2sv_amba3ahblite.sv
View File

@ -111,7 +111,7 @@ module srdl2sv_amba3ahblite
begin begin
// When a transfer is extended it has the side-effecxt // When a transfer is extended it has the side-effecxt
// of extending the address phase of the next transfer // of extending the address phase of the next transfer
if (r2b.rdy) if (HREADYOUT)
begin begin
addr_q <= HADDR; addr_q <= HADDR;
operation_q <= HWRITE ? WRITE : READ; operation_q <= HWRITE ? WRITE : READ;
@ -119,7 +119,7 @@ module srdl2sv_amba3ahblite
end end
SEQ: SEQ:
begin begin
if (r2b.rdy) if (HREADYOUT)
begin begin
addr_q <= addr_q; // TODO addr_q <= addr_q; // TODO
end end