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Tweak default widths of I/O ports

This commit is contained in:
Dennis Potter 2021-05-15 18:04:43 +02:00
parent 7c4f681241
commit 8d86010a0a
Signed by: Dennis
GPG Key ID: 186A8AD440942BAF
1 changed files with 2 additions and 2 deletions
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4
srdl2sv/components/templates/addrmap.yaml
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@ -11,6 +11,6 @@ module_declaration: |-
{outputs}
);
input_port: |-
input {packed_dim:10s}{name:30s} {unpacked_dim},
input {packed_dim:15s}{name:25s} {unpacked_dim},
output_port: |-
output {packed_dim:10s}{name:30s} {unpacked_dim},
output {packed_dim:15s}{name:25s} {unpacked_dim},