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Add support for rsvdset and rsvdsetX
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@ -32,6 +32,14 @@ class AddrMap(Component):
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# Use global settings to define whether a component is already in a generate block
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glbl_settings['generate_active'] = False
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# Save whether 0, 1, or x must be set for reserved bits
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if obj.get_property('rsvdset'):
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glbl_settings['rsvd_val'] = "1"
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elif obj.get_property('rsvdsetX'):
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glbl_settings['rsvd_val'] = "x"
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else:
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glbl_settings['rsvd_val'] = "0"
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# Empty dictionary of register objects
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# We need a dictionary since it might be required to access the objects later
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# by name (for example, in case of aliases)
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@ -157,7 +157,8 @@ class Register(Component):
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current_bit = field.msb + 1
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if empty_bits > 0:
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list_of_fields.append("{}'b0".format(empty_bits))
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list_of_fields.append(
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f"{{{empty_bits}{{1'b{self.glbl_settings['rsvd_val']}}}}}")
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list_of_fields.append("{}_q{}".format(field.path_underscored, self.genvars_str))
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@ -173,7 +174,8 @@ class Register(Component):
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no_reads = not list_of_fields
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if empty_bits > 0:
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list_of_fields.append("{}'b0".format(empty_bits))
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list_of_fields.append(
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f"{{{empty_bits}{{1'b{self.glbl_settings['rsvd_val']}}}}}")
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# Create list of mux-inputs to later be picked up by carrying addrmap
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self.sw_mux_assignment_var_name.append(
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@ -482,12 +484,15 @@ class Register(Component):
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self.obj.current_idx = [0]
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self.name = obj.inst_name
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# Save global settings
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self.glbl_settings = glbl_settings
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# Create mapping between (alias-) name and address
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self.name_addr_mappings = [
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(self.create_underscored_path_static(obj)[3], obj.absolute_address)
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]
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# Gnerate already started?
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# Geneate already started?
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self.generate_active = glbl_settings['generate_active']
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# Empty array for mux-input signals
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