14 Commits

Author	SHA1	Message	Date
Dennis	f0f2ef3d78	Add module description to test_simple_rw_reg.py	2021-10-31 19:43:14 -07:00
Dennis	0371bef439	Long CLI arguments now use dashes rather than underscores	2021-10-31 13:53:11 -07:00
Dennis	031e413d17	Fix test_simple_rw_reg.test_illegal_address so that it always recognizes issue #9 ... Before this fix, the bug would only pop up for addresses that were dividable by 4. Otherwise, the AMBA AHB 3 Lite widget would return an error response because of an illegal HSIZE/HADDR combination.	2021-10-30 23:27:14 -07:00
Dennis	85f7808362	Closes #4: Add support for hierarchical addrmaps ... Every time an addrmap is detected within another addrmap, a new context will be opened and a separate RTL file will be created. All addrmaps will have the same bus-wdiget, but it might be possible that different addrmaps have different maximum regwidths. For that reason, it was necessary to change the non-generic srd2sv_if_pkg to a parametrizable interface. Almost all changes to the templates in this commit are due to name changes from 'b2r' and 'r2b' to 'widget_if'.	2021-10-27 23:27:29 -07:00
Dennis	6719d21423	Fix simple_rw_reg.rdl so that the test passes ... The register was defined as a 64-bit register but the test was written under the assumption it's a 32-bit register. Furthermore, the hardware write-enable flag had to be set since all values would otherwise be overwritten immediately.	2021-10-24 15:43:44 -07:00
Dennis	49d1b598f0	Add setup.py to repository to install srdl2sv	2021-10-24 12:14:03 -07:00
Dennis	4ba047dd2a	Extend test_simple_rw_reg with 3 more tests ... The following tests are now included: - Check access to registers over AHB bus - Check access to register over HW interface - Check access to register over HW interface if hw_wr-input is disabled. - Check if the slave responds with a correct error sequence if an illegal address is accessed.	2021-10-11 23:49:31 -07:00
Dennis	7d5ddaf47c	Add first simple test with a simple 2-dimensional array	2021-10-03 23:24:16 -07:00
Dennis	aada5c5853	Prepare Makefiles for regression flow with CocoTB tests	2021-10-03 18:07:48 -07:00
Dennis	d3bfdeb3f0	Buswidth is now variable, based on widest register ... Fixes #2.	2021-09-26 21:16:49 -07:00
Dennis	6359883c27	Finish initial version of interrupt suport, closes #1 ... The software is now able to create most interrupt combinations of Section 9.9 of the SystemRDL 2.0 LRM. It supports stickybit/non-stickybit interrupts, it support posedge, negedge, bothedge, and level interrupts, and it is able to generate all surrounding logic. This commit also fixes a reset-bug that caused registers that were reset to 0 to be not reset (because 'if not reset_value' will return True if the 'reset_value' is 0).	2021-09-26 19:40:04 -07:00
Dennis	8ea1ad97da	Fix AMBA AHB 3 Lite widget so that first register transactions succeed	2021-09-25 13:01:23 -07:00
Dennis	61cd1fbfe3	Add directory that will contain SystemRDL files for tests	2021-09-13 22:09:04 -07:00
Dennis	24d5534037	Add support for external registers ... Every single field and every single alias (!) has its own interface to the surrounding hardware. This is required to give users the maximum amount of freedom when defining certain properties in RDL.	2021-09-06 18:48:37 -07:00