25 Commits

Author	SHA1	Message	Date
Dennis	9cb53f0fb0	Add simple_rw_reg example with reset signals	2021-11-26 16:53:06 -08:00
Dennis	07855015b0	Remove log file, used while debugging with Verilator	2021-11-26 16:43:54 -08:00
Dennis	2f76e31c12	Update examples with changes from ae83dceb	2021-11-26 16:33:41 -08:00
Dennis	9d05c90d50	Add hwclr property to counters example	2021-11-17 22:21:43 -08:00
Dennis	8fd5a202e8	Add examples build to regression Makefile	2021-11-07 11:53:34 -08:00
Dennis	73dfed0146	Regenerate aliases example with fix from 33b6e2e	2021-11-07 11:38:39 -08:00
Dennis	0dba725fd3	Add external alias in regfile example to aliases-example	2021-11-07 11:19:44 -08:00
Dennis	f81cae107d	Add example with aliases	2021-11-06 22:47:47 -07:00
Dennis	c589a17ea5	Add counter-example	2021-11-06 18:28:21 -07:00
Dennis	fc26817c33	Update Makefiles in examples directory to also invoke a Verilator compile	2021-11-04 23:38:50 -07:00
Dennis	ba45cfc64a	Add parameters example RDL file	2021-11-04 23:33:06 -07:00
Dennis	cc0d961a41	Regenerate examples with changes from 95b9a5a4 and 85dc719	2021-11-02 23:28:58 -07:00
Dennis	9be761b53d	Update example's Makefile to always rebuild if srdl2sv updates	2021-11-02 23:20:35 -07:00
Dennis	6c9df1cc02	Add Makefiles in example/ to easily rebuild all examples	2021-10-31 16:38:27 -07:00
Dennis	82b2490256	Update examples with changes from a43cd2e (issue #7)	2021-10-31 16:01:44 -07:00
Dennis	a871e9a906	Add example to show handling of SystemRDL enums	2021-10-31 13:59:51 -07:00
Dennis	ed167c05de	Update AMBA 3 AHB Lite widget in examples with 33c92c8 (issue #9)	2021-10-30 23:35:38 -07:00
Dennis	7efe7c4cea	Update examples with changes from e46e51f and a148e8b ... The former commit implements fixes that were required for issue #8. The latter only updated the link to report bugs.	2021-10-30 19:38:43 -07:00
Dennis	5a00d48c34	Add RDL example with compiled hierarchical regfiles	2021-10-28 22:55:28 -07:00
Dennis	e6cfec9c32	Update srdl2sv examples with widget<->interface changes ... These changes were introduced in 85f7808 in order to close #4.	2021-10-27 23:33:42 -07:00
Dennis	b8e9adb1f0	Add hierarchical interrupts under examples ... The SystemRDL that was added comes from Section 17.2 "Understanding hierarchical interrupts in SystemRDL" of the SystemRDL 2.0 LRM. The present code succesfully compiles.	2021-10-24 23:33:01 -07:00
Dennis	c4964e0c57	Remove redundant example-file	2021-10-24 14:03:46 -07:00
Dennis	20cec0c2a3	Add missing example RDL file 'simple_rw_reg.rdl'	2021-10-20 23:51:48 -07:00
Dennis	abf3fac24f	Minor clean up, mostly Python Lint warnings	2021-10-20 23:51:07 -07:00
Dennis	1ed801a565	Add simple example with 1-D, 2-D, and 3-D registers	2021-10-20 22:34:37 -07:00