In dc37c879, some properties got saved in self.properties of a
Component. In that commit, self.properties['sw_rd'] never got set.
For that reason, external registers with a read-interface were broken.
When a regfile did use enumerations from multiple scopes this messed up
the eventual packages because every regfile only assumed 1 scope. This
is fixed now.
TODO: Check what happens if enums are defined in the register scope.
The software is now able to create most interrupt combinations of
Section 9.9 of the SystemRDL 2.0 LRM. It supports
stickybit/non-stickybit interrupts, it support posedge, negedge,
bothedge, and level interrupts, and it is able to generate all
surrounding logic.
This commit also fixes a reset-bug that caused registers that were reset
to 0 to be not reset (because 'if not reset_value' will return True if
the 'reset_value' is 0).
Up to this point, interrupt outputs are generated and intr, enable,
mask, haltenable, and haltmask are supported. stick, stikcybit and the
different types of interrupts are not yet supported.
This commit also removes the option to turn off santiy checking. This is
a bad idea anyway...
The reason is that the template will always assume that the
bus signals and the registers are synchronous. Designers should
implement possible synchronization logic outside of this block.
The former issue was a Lint warning. HADDR % HSIZE is a modulo operation
of a 32-bit and 3-bit variable. It is cleaner to only use the LSB of
HADDR.
Furthermore, Verilator does not support unpacked arrays in packages.
Every single field and every single alias (!) has its own
interface to the surrounding hardware. This is required
to give users the maximum amount of freedom when defining
certain properties in RDL.
The error indication is generated if:
- A non-existent register gets read
- An existent register gets read but not a single bit can be
succesfully read or written. As soon as 1 bit succeeds don't
return an error.
The main difference in this release
(https://github.com/SystemRDL/systemrdl-compiler/releases/tag/v1.19.0)
is that FieldNode.get_property('resetsignal') will now default to
finding the nearest in-scope field reset signal if not explicitly set.
The same is true for the cpuif-signal.
Before this commit, the addmap-class searched for resetsignal and cpuif
signals and saved it for the fields to be picked up later. This code is
now not required anymore
The counter now covers more corner cases regarding saturation.
Furthermore, a bug that caused incr & decr-counters to always
inadvertently increment and decrement, even if only one of the two
signals was set.
Furthermore, the overflow signal is now generated in RTL.
Still missing:
- incrthreshold/decrthreshold is not yet supported
- It is not yet supported to assign an underflow/overflow to the
input of another counter.
For addrmaps, the addrmaps appeared twice. It was better anyway to use a
variable name that gets build in create_underscored_path(). This method
was not yet present when the logger was first instantiated.
The software itself is licensed under the copy-left GPL-3.0 license. All
RTL (i.e., templates and widgets) are licensed under the MIT license.
Therefore, the generated RTL will not be subject to the GPL-3.0 but to
the MIT license.