Commit Graph

  • 17f1877390 Add very basic, incomplete statemachine for AHB protocol Dennis 2021-09-12 17:13:44 -07:00
  • 6142a13653 Add genvar-key to write-signals of external registers Dennis 2021-09-12 17:09:33 -07:00
  • b89bf3663f Fix issue with read-mux assignment for multidimensional registers Dennis 2021-09-12 16:44:37 -07:00
  • 5475bbf62d Fix issue that causes 'input None' if no reset is present for a field Dennis 2021-09-06 22:42:32 -07:00
  • 24d5534037 Add support for external registers Dennis 2021-09-06 18:48:37 -07:00
  • a3b6e1caf8 Add file-exist check for input file Dennis 2021-09-06 11:58:01 -07:00
  • 4f2ac8868a Rename regs.yaml to register.yaml for consistency reasons Dennis 2021-09-06 00:29:29 -07:00
  • c689190080 Add proper support for rdy & error indication in read multiplexer Dennis 2021-09-06 00:26:08 -07:00
  • 2f38d30d76 Fix assignment to _rd_mux_in for arrays Dennis 2021-08-22 21:50:58 -07:00
  • 08b7de9544 Fix read-multiplexer bug in case a reg is _not_ an array Dennis 2021-08-22 21:43:53 -07:00
  • d298e79ec1 Fix bug where an empty search path caused srdl2sv to crash Dennis 2021-08-22 21:27:44 -07:00
  • 8881821252 Give more consistent names to modules and packages Dennis 2021-08-22 20:46:35 -07:00
  • 5e4a954a0c Add _very incomplete_ AMBA 3 AHB Lite widget Dennis 2021-08-22 20:38:56 -07:00
  • 145ac70123 Add email address to MIT license Dennis 2021-08-15 14:12:21 -07:00
  • 78742daba7 Add support for 'next' property to fields Dennis 2021-08-15 14:10:22 -07:00
  • a74377bae7 Add underflow property and checker if referenced properties exist Dennis 2021-08-15 12:56:41 -07:00
  • 1d5bc8b75e Fix assignment of overflow to increment input of counter Dennis 2021-08-15 12:28:07 -07:00
  • fd75e4c84c Update systemrdl-compiler to v1.19.0 Dennis 2021-08-15 11:46:40 -07:00
  • 1d50b2b457 Add incrthreshold/decrthreshold support Dennis 2021-06-29 00:14:51 +02:00
  • 18204d9a3e Improve counter property Dennis 2021-06-28 23:58:45 +02:00
  • 4144329f3f Add comment to delineate between counters and multiplexer assignment Dennis 2021-06-28 23:57:32 +02:00
  • a0dd59d19a Add hwenable and hwmask property Dennis 2021-06-28 12:48:17 +02:00
  • c00550a166 Add hwset & hwclr properties Dennis 2021-06-28 00:37:54 +02:00
  • 9385f59ac7 Add counters (w/o threshold property and w/o an overflow property) Dennis 2021-06-27 17:04:48 +02:00
  • f50d65d2d2 Fix path in logger object Dennis 2021-06-27 11:09:10 +02:00
  • 5ed7cccd7f Cleanup __add_swmod_swacc and extend verbosity of warnings/debug Dennis 2021-06-27 00:21:41 +02:00
  • 2e22d82146 Add swmod and swacc properties and fix field-range bug Dennis 2021-06-27 00:09:28 +02:00
  • 95fef548cf Add header with license and generation information to addrmap Dennis 2021-06-26 11:37:56 +02:00
  • 6deb772196 Add LICENSEs to srdl2sv Dennis 2021-06-26 11:08:13 +02:00
  • baf08d2343 Add bus_clk/bus_rst_n ports to widget (rather than (only) reg_clk) Dennis 2021-06-25 11:50:06 +02:00
  • 6565c33445 Resolve Python Lint warnings (e.g., unnecessary list comprehensions) Dennis 2021-06-25 11:46:18 +02:00
  • c7f571b909 Fix missing multiplexer entries for single-dimension registers Dennis 2021-06-25 11:45:47 +02:00
  • 695de2d330 Add <<INDENT>> and <<UNINDENT>> helpers to template Dennis 2021-06-25 11:33:57 +02:00
  • 01a696c2b3 Add default value to mux to prevent an inferred latch Dennis 2021-06-25 01:35:55 +02:00
  • ce4782c11d Pull declaration of variables outside of generate scope Dennis 2021-06-25 01:20:32 +02:00
  • 3089edc20d Add indentation to case-block Dennis 2021-06-24 01:05:55 +02:00
  • 31179eeecc Add get_package_rtl()-method to regfiles Dennis 2021-06-24 01:00:36 +02:00
  • 0db14e8815 Add missing sw_rd_bus-input port to widget Dennis 2021-06-24 00:58:42 +02:00
  • 32c6fc3c4a Add read-multiplexer logic Dennis 2021-06-23 01:03:11 +02:00
  • b2c756af41 Add support for alias registers Dennis 2021-06-12 01:28:29 +02:00
  • 9deb28ce4e Add initial version of widget-code and fix remaining SV compiler errors Dennis 2021-06-05 15:37:09 +02:00
  • 21abdefac0 Add genvar declaration to addrmap Dennis 2021-06-03 18:07:17 +02:00
  • f4432f5b49 Add check for uniqueness of enum member names within a scope Dennis 2021-06-03 16:46:49 +02:00
  • ec492d619a Fix widths in OnWrite and OnRead properties Dennis 2021-06-03 16:11:58 +02:00
  • ee20126da6 Add missing 'endmodule' keyword to addrmap Dennis 2021-06-03 12:56:26 +02:00
  • 22f88efcd8 Fix compile error because of multiple else branches Dennis 2021-06-03 12:53:39 +02:00
  • 5d76830931 Fix generate/endgenerate and end of generate loops in regfiles Dennis 2021-06-03 12:15:27 +02:00
  • 4f6010eed2 Dump addrmap packages with enums Dennis 2021-06-03 12:02:27 +02:00
  • fa7adf0a54 Add initial README and logo Dennis 2021-05-31 23:23:56 +02:00
  • 077dcde0cf Add requirements.txt Dennis 2021-05-31 00:39:19 +02:00
  • 8a82d37737 Add regfile capabilities Dennis 2021-05-31 00:37:41 +02:00
  • 2a3cc9505e Add support for field_reset and cpuif_reset Dennis 2021-05-24 14:42:24 +02:00
  • 44c87af8cb Fix active_low/active_high reset bug Dennis 2021-05-24 11:49:51 +02:00
  • b7c1a12179 Add support for enumeration encoding Dennis 2021-05-24 11:41:45 +02:00
  • 085e2ea2dc Provide more advanced way of adding internal signals or ports Dennis 2021-05-23 17:46:48 +02:00
  • c5755bf104 Removed genvars in case only 1 dimension with 1 entry is used Dennis 2021-05-17 00:15:43 +02:00
  • 203f1e1b36 Add swwe and swwel properties Dennis 2021-05-16 23:53:58 +02:00
  • 92d61dd7c8 Add onread/onwrite properties to field class Dennis 2021-05-16 12:49:17 +02:00
  • 3acd7516d3 Fix bug in <REG>_sw_wr/<REG>_sw_rd for non-array registers Dennis 2021-05-16 12:24:52 +02:00
  • a59668de87 Ensure that component logs don't propagate to the root Dennis 2021-05-16 12:17:52 +02:00
  • 8d86010a0a Tweak default widths of I/O ports Dennis 2021-05-15 18:04:43 +02:00
  • 7c4f681241 Add SW read- and write wires, including assignment Dennis 2021-05-15 18:00:22 +02:00
  • 4b9ad7ad1b Fix SW write wire and improve I/O packed dimension Dennis 2021-05-15 17:57:50 +02:00
  • 4738cbfe6c Add support for 1 packed and 26 unpacked dimensions in addrmap's I/O Dennis 2021-05-15 01:17:06 +02:00
  • cecb73f07a Fundamental changes to the architecture of component classes Dennis 2021-05-15 00:29:59 +02:00
  • 59b91536ed Propgate logger through components and let top-level write SV Dennis 2021-05-11 00:28:52 +02:00
  • 27c4e9de3c Add proper logging mechanism to application Dennis 2021-05-10 00:59:52 +02:00
  • c32bfdd8c0 Change way SV keyword 'else' is added to access_rtl Dennis 2021-05-08 11:52:34 +02:00
  • ea998b7db0 Add argparse.ArgumentParser based CliArguments class Dennis 2021-05-08 11:17:56 +02:00
  • f1d9ba2656 Change way the order of RTL is determined Dennis 2021-05-04 00:23:14 +02:00
  • 861a020aff Initial commit of SRDL2SV Dennis 2021-05-02 00:58:43 +02:00