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• 9cb53f0fb0
  
  Add simple_rw_reg example with reset signals develop Dennis 2021-11-26 16:53:06 -0800
• d8add0d5f2
  
  Add more padding between 'input' and name of reset-signal Dennis 2021-11-26 16:52:46 -0800
• 07855015b0
  
  Remove log file, used while debugging with Verilator Dennis 2021-11-26 16:43:54 -0800
• 2f76e31c12
  
  Update examples with changes from ae83dceb Dennis 2021-11-26 16:33:41 -0800
• ae83dceb7a
  
  Closes #13: I/O ports are now grouped and are tied to the register the belong to Dennis 2021-11-26 16:15:00 -0800
• 9d05c90d50
  
  Add hwclr property to counters example Dennis 2021-11-17 22:21:43 -0800
• 4cb00dc38f Add information on HTML/UVM/IP-XACT tools and add more limitations Dennis 2021-11-07 12:00:47 -0800
• 8fd5a202e8
  
  Add examples build to regression Makefile Dennis 2021-11-07 11:53:34 -0800
• 719b013b88
  
  Fix Python lint warnings related to logging Dennis 2021-11-07 11:44:07 -0800
• 73dfed0146
  
  Regenerate aliases example with fix from 33b6e2e Dennis 2021-11-07 11:38:39 -0800
• 33b6e2e946
  
  Fix regression in OnRead and OnWrite properties Dennis 2021-11-07 11:36:05 -0800
• 0dba725fd3
  
  Add external alias in regfile example to aliases-example Dennis 2021-11-07 11:19:44 -0800
• 3e7344a79c
  
  Fix wrong scope names and compilation issues with external aliases Dennis 2021-11-07 11:19:03 -0800
• 1b4c071a85
  
  Add Verilator obj_dir directory to .gitignore Dennis 2021-11-06 22:50:58 -0700
• f81cae107d
  
  Add example with aliases Dennis 2021-11-06 22:47:47 -0700
• 0887372dbd
  
  Fix alias bugs introduced when adding external registers Dennis 2021-11-06 22:45:34 -0700
• c589a17ea5
  
  Add counter-example Dennis 2021-11-06 18:28:21 -0700
• 17c1b9b9a0
  
  Fix bug with static values for saturate/threshold values Dennis 2021-11-06 18:24:42 -0700
• b44813e0c5
  
  Fix addrmap & memory/regfile/register/field-naming collision Dennis 2021-11-06 18:00:17 -0700
• 8fbf800c4f
  
  Fix bug with dynamic saturate values and fix Lint warnings Dennis 2021-11-06 17:36:45 -0700
• 5d3fd14144
  
  Fix bug that prevented descriptions from being generated inserted Dennis 2021-11-06 10:57:46 -0700
• 85598af11e
  
  Closes #11: Add flag to turn off error-response on illegal addresses Dennis 2021-11-06 10:25:32 -0700
• fc26817c33
  
  Update Makefiles in examples directory to also invoke a Verilator compile Dennis 2021-11-04 23:38:50 -0700
• ba45cfc64a
  
  Add parameters example RDL file Dennis 2021-11-04 23:33:06 -0700
• cc0d961a41
  
  Regenerate examples with changes from 95b9a5a4 and 85dc719 Dennis 2021-11-02 23:28:58 -0700
• 85dc71919e
  
  Fix bug introduced in 95b9a5a4 that broke registers with just 1 byte Dennis 2021-11-02 23:28:37 -0700
• 9be761b53d
  
  Update example's Makefile to always rebuild if srdl2sv updates Dennis 2021-11-02 23:20:35 -0700
• 95b9a5a46a
  
  Gather bit-ranges of byte-enable signal in error-wire Dennis 2021-11-02 23:17:28 -0700
• 8df25ece01
  
  Closes #10: sw read/write side-effects now honor byte-enables if enabled Dennis 2021-10-31 22:36:51 -0700
• 22a822c097
  
  Add initial version of sofware access property tests Dennis 2021-10-31 21:56:08 -0700
• d4d5868382
  
  Update Makefile to rebuild on srdl2sv changes and better error reporting Dennis 2021-10-31 21:54:11 -0700
• f0f2ef3d78
  
  Add module description to test_simple_rw_reg.py Dennis 2021-10-31 19:43:14 -0700
• 247f1a7575
  
  Update CLI arguments in README description Dennis 2021-10-31 19:35:36 -0700
• 6c9df1cc02
  
  Add Makefiles in example/ to easily rebuild all examples Dennis 2021-10-31 16:38:27 -0700
• 82b2490256
  
  Update examples with changes from a43cd2e (issue #7) Dennis 2021-10-31 16:00:00 -0700
• a43cd2ea6c
  
  Closes #7: Add flag that disables unpacked arrays Dennis 2021-10-31 15:58:31 -0700
• a871e9a906
  
  Add example to show handling of SystemRDL enums Dennis 2021-10-31 13:59:51 -0700
• 0371bef439
  
  Long CLI arguments now use dashes rather than underscores Dennis 2021-10-31 13:53:11 -0700
• ed167c05de
  
  Update AMBA 3 AHB Lite widget in examples with 33c92c8 (issue #9) Dennis 2021-10-30 23:35:38 -0700
• 33c92c8994
  
  Closes #9: Error returns from regblock now actually get processed by AHB widget Dennis 2021-10-30 23:30:55 -0700
• 031e413d17
  
  Fix test_simple_rw_reg.test_illegal_address so that it always recognizes issue #9 Dennis 2021-10-30 23:27:14 -0700
• 7efe7c4cea
  
  Update examples with changes from e46e51f and a148e8b Dennis 2021-10-30 19:38:43 -0700
• a148e8bbd1 Update link in header to report bugs Dennis 2021-10-30 19:37:02 -0700
• e46e51f3cf
  
  Closes #8: Certain fields shall be implemented as wires or constants Dennis 2021-10-30 19:33:14 -0700
• 5a00d48c34
  
  Add RDL example with compiled hierarchical regfiles Dennis 2021-10-28 22:55:28 -0700
• 738be4ddc4
  
  Update README.md with output-file information Dennis 2021-10-27 23:57:15 -0700
• e6cfec9c32
  
  Update srdl2sv examples with widget<->interface changes Dennis 2021-10-27 23:33:42 -0700
• 85f7808362
  
  Closes #4: Add support for hierarchical addrmaps Dennis 2021-10-27 23:27:29 -0700
• ac693f0c02
  
  Change default logging settings Dennis 2021-10-27 23:22:27 -0700
• b8e9adb1f0
  
  Add hierarchical interrupts under examples Dennis 2021-10-24 23:33:01 -0700
• eb3f1dd57e
  
  Resolve UnboundLocalError bug when SignalNodes are instantiated Dennis 2021-10-24 23:17:47 -0700
• 27c5931101
  
  Add option to add no bus-widget Dennis 2021-10-24 21:33:49 -0700
• 0ab368113e
  
  Move MIT LICENSE to templates & widgets directory Dennis 2021-10-24 20:34:06 -0700
• d032e77ed8
  Fix layout of GPLv3 license Dennis Potter 2021-10-24 20:00:23 -0700
• b6af2c154c
  
  Update Git address to Github in README.md Dennis 2021-10-24 15:55:43 -0700
• 6719d21423
  
  Fix simple_rw_reg.rdl so that the test passes Dennis 2021-10-24 15:43:44 -0700
• c4964e0c57
  
  Remove redundant example-file Dennis 2021-10-24 14:03:46 -0700
• 25b562ca65
  
  Update warning and license description in README.md Dennis 2021-10-24 13:49:59 -0700
• 9ac58367ff
  
  Add installation instructions to README.md Dennis 2021-10-24 13:22:09 -0700
• 7c55cfaa8e
  
  Logger should always lazy evaluate variables Dennis 2021-10-24 12:36:17 -0700
• 49d1b598f0
  
  Add setup.py to repository to install srdl2sv Dennis 2021-10-24 12:14:03 -0700
• ec02290bbe
  
  Move several methods to common Components ancestor Dennis 2021-10-24 00:07:59 -0700
• 20cec0c2a3
  
  Add missing example RDL file 'simple_rw_reg.rdl' Dennis 2021-10-20 23:51:48 -0700
• abf3fac24f
  
  Minor clean up, mostly Python Lint warnings Dennis 2021-10-20 23:51:07 -0700
• 1ed801a565
  
  Add simple example with 1-D, 2-D, and 3-D registers Dennis 2021-10-20 22:34:37 -0700
• 2da71dabf1
  
  Update README.md to latest feature set Dennis 2021-10-20 22:25:07 -0700
• 1b011ff593
  
  Replace SW Mux Entry by a dataclass, rather than an (unnamed) tuple Dennis 2021-10-19 23:58:02 -0700
• d80224c43d
  
  Do not generate seperate comparisons for cpu interface mux Dennis 2021-10-19 23:33:59 -0700
• 463bc22e12
  
  Add missing 'endgenerate' in srdl2sv_amba3ahblite.sv Dennis 2021-10-19 23:26:14 -0700
• 5e47ff664a
  
  Add option to disable byte-enables Dennis 2021-10-18 23:48:14 -0700
• 4d3f302a54
  
  Add initial support for memory type registers Dennis 2021-10-18 23:40:19 -0700
• fd7acae701
  
  Update systemrdl-compiler version in requirements.txt Dennis 2021-10-18 23:07:15 -0700
• 9046dcf3e3
  
  Description in regfile.yaml now says 'regfile' and not 'register' Dennis 2021-10-18 23:06:21 -0700
• e05408e8a1
  
  Add support for inline-comments Dennis 2021-10-17 00:53:22 -0700
• 16d1774cd2
  
  Remove log.py TODO that got already implemented Dennis 2021-10-14 23:29:19 -0700
• b23ddded74
  
  Package with enums shall not be dumped if no enums are present Dennis 2021-10-14 23:22:01 -0700
• 6e355c62af
  
  Add support for rsvdset and rsvdsetX Dennis 2021-10-14 23:16:30 -0700
• 4ba047dd2a
  
  Extend test_simple_rw_reg with 3 more tests Dennis 2021-10-11 23:49:31 -0700
• ed08d4bd35
  
  Fix external-register bug where the sw_rd-wire is missing Dennis 2021-10-06 23:39:04 -0700
• 57d8050d56
  
  Fix bug in bus-width of amba3ahblite-widget's instantiation Dennis 2021-10-06 23:28:48 -0700
• ace4238ccf
  
  Fix bug in external read-interface Dennis 2021-10-06 23:20:55 -0700
• aa770073c4
  
  Ensure that file-log gets dumped in --out_dir Dennis 2021-10-03 23:31:22 -0700
• 7d5ddaf47c
  
  Add first simple test with a simple 2-dimensional array Dennis 2021-10-03 23:24:16 -0700
• c4dca87ab5
  
  Ensure that HSIZE is flopped and that data is shifted according to HADDR/HSIZE Dennis 2021-10-03 23:22:54 -0700
• aada5c5853
  
  Prepare Makefiles for regression flow with CocoTB tests Dennis 2021-10-03 18:07:48 -0700
• 694f7c124e
  
  Make stickybit available for non-intr fields and add support for sticky Dennis 2021-10-03 15:48:27 -0700
• f30dce67c2
  
  Give all genvars an gv_ prefix to prevent collisions Dennis 2021-10-02 00:38:31 -0700
• dc37c87944
  
  Ensure that sw_rd/sw_wr wires are only generated if they are required Dennis 2021-10-02 00:32:04 -0700
• 8756945a6d
  
  Repair multi-enumerations in one regfile bug Dennis 2021-09-30 00:11:50 -0700
• d3bfdeb3f0
  
  Buswidth is now variable, based on widest register Dennis 2021-09-26 21:16:49 -0700
• 6359883c27
  
  Finish initial version of interrupt suport, closes #1 Dennis 2021-09-26 19:40:04 -0700
• c52e59abd0
  
  Add basic interrupt framework Dennis 2021-09-25 20:49:39 -0700
• 8ea1ad97da
  
  Fix AMBA AHB 3 Lite widget so that first register transactions succeed Dennis 2021-09-25 13:01:23 -0700
• 28edf17a1c
  
  Pull assignment of multiplexer wires into generate for-loop Dennis 2021-09-19 23:24:59 -0700
• 887164dd52
  
  Flip r_vld and w_vld in <REG>_sw_wr/<REG>_sw_rd assignment Dennis 2021-09-15 23:47:36 -0700
• fea0019aa8
  
  Replace old 'reg_clk' name by more generic 'clk' Dennis 2021-09-15 23:42:52 -0700
• 61cd1fbfe3
  
  Add directory that will contain SystemRDL files for tests Dennis 2021-09-13 22:09:04 -0700
• 85aa2f903c
  
  Flops must not update when HREADYOUT == 0, not when r2b.rdy == 0 Dennis 2021-09-13 21:52:35 -0700
• a27b57009b
  
  Fix two issues to get AMBA widget compile clean under Verilator Dennis 2021-09-12 19:38:09 -0700
• 240fba8e12
  
  Resolve bug for addrmaps without any genvars Dennis 2021-09-12 19:37:30 -0700